The present disclosure relates generally to integrated circuit devices with one or more embedded die. More particularly, the present disclosure relates to an embedded die that directly connects to another die.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Integrated circuits (ICs) take a variety of forms. These ICs are usually formed using a die. A die is a small block of semiconductor material (e.g., silicon) upon which a circuit is located. The circuit on the die may perform a specific function (e.g., operational amplifier) or more general-purpose functions, such as processors or programmable devices [e.g., field programmable gate array, (FPGA)]. One or more die (or dice) may be packaged together in an integrated circuit (IC). The packaged IC provides protection for the one or more die and their circuitry. The packaging may also provide an accessible connection to the one or more die from outside the package and/or provide interconnection between the die. However, these connections to the die and/or between the die may control latency of functions to be performed by the integrated circuit. Specifically, longer connections and lower density of the connections increases latency in those connections. One method of providing such interconnections includes using a through-silicon via (TSV). However, TSVs are costly to fabricate with relatively high levels of technical issues and complexities in implementation during fabrication of the integrated circuit device.